CMSIS-Core (Cortex-A): Cache and branch predictor maintenance operations

| CMSIS-Core (Cortex-A) Version 1.2.1 CMSIS-Core support for Cortex-A processor-based devices

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Cache and branch predictor maintenance operations
Core Register Access

This section describes the cache and branch predictor maintenance operations. More...

## Functions

__STATIC_FORCEINLINE void | __set_BPIALL (uint32_t value)
| Set BPIALL. More...
__STATIC_FORCEINLINE void | __set_DCCIMVAC (uint32_t value)
| Set DCCIMVAC. More...
__STATIC_FORCEINLINE void | __set_DCCMVAC (uint32_t value)
| Set DCCMVAC. More...
__STATIC_FORCEINLINE void | __set_DCIMVAC (uint32_t value)
| Set DCIMVAC. More...
__STATIC_FORCEINLINE void | __set_ICIALLU (uint32_t value)
| Set ICIALLU. More...

## Description

Cache maintenance operations are defined to act on particular memory locations. In addition, for instruction caches and branch predictors, there are operations that invalidate all entries.

Consider using L1 Cache Functions and L2C-310 Cache Controller Functions for cache maintenance instead of raw register usage.

## Function Documentation

__STATIC_INLINE void __set_BPIALL | ( | uint32_t | value | ) |

Branch Predictor Invalidate All

This function writes the provided value to the Branch Predictor Invalidate All (BPIALL) register.

__STATIC_INLINE void __set_DCCIMVAC | ( | uint32_t | value | ) |

Data cache clean and invalidate

This function cleans and invalidates data or unified cache line by MVA to PoC.

__STATIC_INLINE void __set_DCCMVAC | ( | uint32_t | value | ) |

Data cache clean

This function cleans data or unified cache line by MVA to PoC.

__STATIC_INLINE void __set_DCIMVAC | ( | uint32_t | value | ) |

Data cache invalidate

This function invalidates data or unified cache line by MVA to PoC.

__STATIC_INLINE void __set_ICIALLU | ( | uint32_t | value | ) |

Instruction Cache Invalidate All

This function invalidates all instruction cache.