CMSIS-Core (Cortex-A): Floating-Point Exception Control register (FPEXC)

| CMSIS-Core (Cortex-A) Version 1.2.1 CMSIS-Core support for Cortex-A processor-based devices

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Floating-Point Exception Control register (FPEXC)
Core Register Access

Provides a global enable for the Advanced SIMD and Floating-point (VFP) Extensions, and indicates how the state of these extensions is recorded. More...

## Functions

__STATIC_INLINE uint32_t | __get_FPEXC (void)
| Get FPEXC (Floating Point Exception Control Register) More...
__STATIC_INLINE void | __set_FPEXC (uint32_t fpexc)
| Set FPEXC (Floating Point Exception Control Register) More...

## Description

Bits | Name | Function
--- | --- | ---
[31] | EX | Exception bit.
[30] | EN | Enable bit.
[29:0] | - | SUBARCHITECTURE DEFINED.

Consider __get_FPEXC and __set_FPEXC to access this register.

## Function Documentation

__STATIC_INLINE uint32_t __get_FPEXC | ( | void |  | ) |

Returns
  Floating Point Exception Control Register value

This function returns the current value of the Floating-Point Exception Control register (FPEXC).

__STATIC_INLINE void __set_FPEXC | ( | uint32_t | fpexc | ) |

Parameters

  [in] | fpexc | Floating Point Exception Control value to set

This function assigns the given value to the Floating-Point Exception Control register (FPEXC).