CMSIS-Core (Cortex-A): ACTLR Bits

| CMSIS-Core (Cortex-A) Version 1.2.1 CMSIS-Core support for Cortex-A processor-based devices

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ACTLR Bits
Auxiliary Control Register (ACTLR)

Bit position and mask macros. More...

## Macros

#define | ACTLR_DDI_Pos 28U
| ACTLR: DDI Position. More...
#define | ACTLR_DDI_Msk (1UL << ACTLR_DDI_Pos)
| ACTLR: DDI Mask. More...
#define | ACTLR_DBDI_Pos 28U
| ACTLR: DBDI Position. More...
#define | ACTLR_DBDI_Msk (1UL << ACTLR_DBDI_Pos)
| ACTLR: DBDI Mask. More...
#define | ACTLR_BTDIS_Pos 18U
| ACTLR: BTDIS Position. More...
#define | ACTLR_BTDIS_Msk (1UL << ACTLR_BTDIS_Pos)
| ACTLR: BTDIS Mask. More...
#define | ACTLR_RSDIS_Pos 17U
| ACTLR: RSDIS Position. More...
#define | ACTLR_RSDIS_Msk (1UL << ACTLR_RSDIS_Pos)
| ACTLR: RSDIS Mask. More...
#define | ACTLR_BP_Pos 15U
| ACTLR: BP Position. More...
#define | ACTLR_BP_Msk (3UL << ACTLR_BP_Pos)
| ACTLR: BP Mask. More...
#define | ACTLR_DDVM_Pos 15U
| ACTLR: DDVM Position. More...
#define | ACTLR_DDVM_Msk (1UL << ACTLR_DDVM_Pos)
| ACTLR: DDVM Mask. More...
#define | ACTLR_L1PCTL_Pos 13U
| ACTLR: L1PCTL Position. More...
#define | ACTLR_L1PCTL_Msk (3UL << ACTLR_L1PCTL_Pos)
| ACTLR: L1PCTL Mask. More...
#define | ACTLR_RADIS_Pos 12U
| ACTLR: RADIS Position. More...
#define | ACTLR_RADIS_Msk (1UL << ACTLR_RADIS_Pos)
| ACTLR: RADIS Mask. More...
#define | ACTLR_L1RADIS_Pos 12U
| ACTLR: L1RADIS Position. More...
#define | ACTLR_L1RADIS_Msk (1UL << ACTLR_L1RADIS_Pos)
| ACTLR: L1RADIS Mask. More...
#define | ACTLR_DWBST_Pos 11U
| ACTLR: DWBST Position. More...
#define | ACTLR_DWBST_Msk (1UL << ACTLR_DWBST_Pos)
| ACTLR: DWBST Mask. More...
#define | ACTLR_L2RADIS_Pos 11U
| ACTLR: L2RADIS Position. More...
#define | ACTLR_L2RADIS_Msk (1UL << ACTLR_L2RADIS_Pos)
| ACTLR: L2RADIS Mask. More...
#define | ACTLR_DODMBS_Pos 10U
| ACTLR: DODMBS Position. More...
#define | ACTLR_DODMBS_Msk (1UL << ACTLR_DODMBS_Pos)
| ACTLR: DODMBS Mask. More...
#define | ACTLR_PARITY_Pos 9U
| ACTLR: PARITY Position. More...
#define | ACTLR_PARITY_Msk (1UL << ACTLR_PARITY_Pos)
| ACTLR: PARITY Mask. More...
#define | ACTLR_AOW_Pos 8U
| ACTLR: AOW Position. More...
#define | ACTLR_AOW_Msk (1UL << ACTLR_AOW_Pos)
| ACTLR: AOW Mask. More...
#define | ACTLR_EXCL_Pos 7U
| ACTLR: EXCL Position. More...
#define | ACTLR_EXCL_Msk (1UL << ACTLR_EXCL_Pos)
| ACTLR: EXCL Mask. More...
#define | ACTLR_SMP_Pos 6U
| ACTLR: SMP Position. More...
#define | ACTLR_SMP_Msk (1UL << ACTLR_SMP_Pos)
| ACTLR: SMP Mask. More...
#define | ACTLR_WFLZM_Pos 3U
| ACTLR: WFLZM Position. More...
#define | ACTLR_WFLZM_Msk (1UL << ACTLR_WFLZM_Pos)
| ACTLR: WFLZM Mask. More...
#define | ACTLR_L1PE_Pos 2U
| ACTLR: L1PE Position. More...
#define | ACTLR_L1PE_Msk (1UL << ACTLR_L1PE_Pos)
| ACTLR: L1PE Mask. More...
#define | ACTLR_FW_Pos 0U
| ACTLR: FW Position. More...
#define | ACTLR_FW_Msk (1UL << ACTLR_FW_Pos)
| ACTLR: FW Mask. More...

## Description

## Macro Definition Documentation

#define ACTLR_AOW_Msk (1UL << ACTLR_AOW_Pos)

#define ACTLR_AOW_Pos 8U

#define ACTLR_BP_Msk (3UL << ACTLR_BP_Pos)

#define ACTLR_BP_Pos 15U

#define ACTLR_BTDIS_Msk (1UL << ACTLR_BTDIS_Pos)

#define ACTLR_BTDIS_Pos 18U

#define ACTLR_DBDI_Msk (1UL << ACTLR_DBDI_Pos)

#define ACTLR_DBDI_Pos 28U

#define ACTLR_DDI_Msk (1UL << ACTLR_DDI_Pos)

#define ACTLR_DDI_Pos 28U

#define ACTLR_DDVM_Msk (1UL << ACTLR_DDVM_Pos)

#define ACTLR_DDVM_Pos 15U

#define ACTLR_DODMBS_Msk (1UL << ACTLR_DODMBS_Pos)

#define ACTLR_DODMBS_Pos 10U

#define ACTLR_DWBST_Msk (1UL << ACTLR_DWBST_Pos)

#define ACTLR_DWBST_Pos 11U

#define ACTLR_EXCL_Msk (1UL << ACTLR_EXCL_Pos)

#define ACTLR_EXCL_Pos 7U

#define ACTLR_FW_Msk (1UL << ACTLR_FW_Pos)

#define ACTLR_FW_Pos 0U

#define ACTLR_L1PCTL_Msk (3UL << ACTLR_L1PCTL_Pos)

#define ACTLR_L1PCTL_Pos 13U

#define ACTLR_L1PE_Msk (1UL << ACTLR_L1PE_Pos)

#define ACTLR_L1PE_Pos 2U

#define ACTLR_L1RADIS_Msk (1UL << ACTLR_L1RADIS_Pos)

#define ACTLR_L1RADIS_Pos 12U

#define ACTLR_L2RADIS_Msk (1UL << ACTLR_L2RADIS_Pos)

#define ACTLR_L2RADIS_Pos 11U

#define ACTLR_PARITY_Msk (1UL << ACTLR_PARITY_Pos)

#define ACTLR_PARITY_Pos 9U

#define ACTLR_RADIS_Msk (1UL << ACTLR_RADIS_Pos)

#define ACTLR_RADIS_Pos 12U

#define ACTLR_RSDIS_Msk (1UL << ACTLR_RSDIS_Pos)

#define ACTLR_RSDIS_Pos 17U

#define ACTLR_SMP_Msk (1UL << ACTLR_SMP_Pos)

#define ACTLR_SMP_Pos 6U

#define ACTLR_WFLZM_Msk (1UL << ACTLR_WFLZM_Pos)

#define ACTLR_WFLZM_Pos 3U