michael ca3d4bf31b WIP: sniff infrastructure, transport additions, test coverage ...

In-progress work — committing before refactor merge so git rename
detection can carry changes to new file locations.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

2026-03-18 19:33:10 -07:00

..

__pycache__

feat(pm3py): project scaffolding with CRC-16/A and protocol constants

2026-03-15 22:11:38 -07:00

__init__.py

feat(pm3py): project scaffolding with CRC-16/A and protocol constants

2026-03-15 22:11:38 -07:00

test_crc.py

feat(pm3py): project scaffolding with CRC-16/A and protocol constants

2026-03-15 22:11:38 -07:00

test_hf_14a.py

feat(pm3py): HF core + ISO14443A commands

2026-03-15 22:16:54 -07:00

test_hf_15.py

WIP: sniff infrastructure, transport additions, test coverage

2026-03-18 19:33:10 -07:00

test_hf_mf.py

feat(pm3py): ISO15693 + MIFARE Classic commands

2026-03-15 22:18:11 -07:00

test_hf.py

feat(pm3py): HF core + ISO14443A commands

2026-03-15 22:16:54 -07:00

test_hw.py

fix(pm3py): platform-aware LED color mapping (Easy vs RDV4 have different physical layouts)

2026-03-16 00:22:43 -07:00

test_integration.py

feat(pm3py): add Proxmark3.sync() for REPL/script usage without async boilerplate

2026-03-16 00:09:14 -07:00

test_lf.py

feat(pm3py): LF commands (tune, read, sniff, sim, config, search, t55xx)

2026-03-15 22:15:51 -07:00

test_transport.py

fix(pm3py): disable CRC for USB (matching C client), fix CRC byte order for FPC UART

2026-03-16 00:03:23 -07:00