Add hall sensor circuit design, NTAG5 config check tool, I2C bus docs
- Hall sensor + LP5562 EN wired-AND circuit design (DRV5032FB/FE, 1M pull-up, open-drain topology) with three interaction modes: boot-time recovery, tap-to-swap, hold-to-confirm recovery - NTAG5 config check tool (tools/ntag5_config_check.py) using uFCoder library for ISO15693 transparent mode via uFR Zero reader. Supports inventory + addressed mode for multi-tag fields. - Updated DEVELOPMENT_PLAN with I2C bus management notes for LP5562 (0x30) + NTAG5Link (0x54) shared bus - Updated README with wired-AND hardware diagram, hall sensor interaction section, and updated wiring table - Updated CLAUDE.md with LP5562 EN wired-AND topology docs - Updated STATUS.md with hall sensor decisions and hardware inventory Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
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CLAUDE.md
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CLAUDE.md
@@ -66,6 +66,8 @@ The LP5562 driver does NOT enforce timing delays internally — the caller is re
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## Key I2C Addresses
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Both devices share the same I2C bus (A4/A5). Non-conflicting addresses — no bus arbitration issues.
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| Device | Address | Notes |
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|--------|---------|-------|
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| LP5562 | 0x30 | ADDR_SEL pins both low (LP5562EVM default) |
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@@ -95,9 +97,11 @@ Key config constants (from `../ntag5sensor/vicinity/ntag5link.py`):
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|----------|------------|----------|
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| A4 (SDA) | LP5562 SDA, NTAG5 SDA | Shared I2C data |
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| A5 (SCL) | LP5562 SCL, NTAG5 SCL | Shared I2C clock |
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| D0/A0 | LP5562 EN | Hardware enable (GPIO, active high) |
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| TBD | NTAG5 FD pin | Field detect / SRAM write indication (EIC wake) |
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| TBD | Hall sensor | Recovery mode trigger (EIC wake) |
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| D0/A0 | LP5562 EN line (open-drain) | Wired-AND with hall sensor, pull-up to VCC |
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| TBD (EIC) | Hall sensor output | EIC wake + wired-AND to LP5562 EN line |
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| TBD (EIC) | NTAG5 FD pin | Field detect / SRAM write indication (EIC wake) |
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**LP5562 EN wired-AND**: D0/A0 (open-drain) and hall sensor (open-drain, active-low) both connect to LP5562 EN with a 1M pull-up. Either can force EN low. Magnet kills LEDs at hardware level regardless of MCU state.
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## Testing
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