LP5562 requires 2.7V min but NFC energy harvesting produces only 1.8V.
New architecture: SAMD21 drives 6 red LEDs directly via TCC0/TCC1
hardware PWM through current-limiting resistors.
Key changes:
- Add TCC PWM driver (src/led/pwm.rs) for 6 GPIO-direct LED channels
- Rewrite pattern engine: software waveform LUTs (sine/triangle/square/
heartbeat) replace LP5562 hardware execution engines
- Add XBLK v2 EEPROM format with 16-byte pattern entries + playlist
- Add TC4 50Hz ISR for animation, power governor for current budget
- Add NTAG5 EH provisioning: persistent config + session trigger
- Critical finding: SRAM passthrough in persistent EEPROM blocks all
NFC access when MCU unpowered — CONFIG_1 must be session-only
- Add provision_eh.py PCSC tool for ACR1552 reader
- Update CLAUDE.md and STATUS.md for new architecture
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
ISO15693 already provides CRC-16 at the transport layer, making
the application-layer CRC redundant. Simplifies header from 6 to
4 bytes, removes crc16_continue/verify_crc, and drops STATUS_BAD_CRC.
Also updates design doc and fixes markdown table formatting.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Pattern entry bytes 108-109 now hold next_pattern (0xFF=loop forever,
0-8=chain to index) and loop_count. MCU will poll LP5562 STATUS register
to detect engine completion and load the successor pattern.
Updated XBLK format spec, Rust Pattern struct (serializer + deserializer),
and React Native app design doc (binary format, data model, resolved
open questions).
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
XBLK binary format for pattern library in NTAG5 upper 1K EEPROM:
- 16-byte header (magic, version, pattern count, active index, CRC-16)
- Up to 9 × 112-byte fixed-size pattern entries
- Deserializer + serializer in src/pattern/mod.rs
- MCU self-provisions hardcoded patterns on first boot (no XBLK found)
- Subsequent boots load active pattern directly from EEPROM
- Python serializer tool for future PCSC-based pattern uploads
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Add error-resilient firmware with diagnostic LED blink patterns
(3 slow = alive, solid = I2C OK, fast burst = I2C error). Document
EVM external MCU wiring: disconnect P6 EN jumper, power VDD from
XIAO 5V, leave SCL/SDA jumpers in place with MSP430 unpowered.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Reverse-engineered the MSP430 serial protocol on the LP5562EVM:
- I<addr><reg> reads, O<addr><reg><data> writes, status 00=OK / 02=NAK
- EN pin must be jumpered to VDD (MSP430 doesn't drive it after reset)
- CONFIG (0x0B) is write-only, W_CURRENT (0x09) not writable via bridge
- LED cycling verified: all 4 channels respond to direct PWM control
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
The uFR Zero presents as CCID (not serial), so the uFCoder library
cannot communicate with it. Rewrote ntag5_config_check.py to use
pyscard with auto-detection: ACR1552 for full NXP config verification,
generic PCSC for basic tag info. Removed uFCoder library (unusable).
Backed up CCID Info.plist before adding uFR Zero VID:PID entry.
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
- Hall sensor + LP5562 EN wired-AND circuit design (DRV5032FB/FE,
1M pull-up, open-drain topology) with three interaction modes:
boot-time recovery, tap-to-swap, hold-to-confirm recovery
- NTAG5 config check tool (tools/ntag5_config_check.py) using
uFCoder library for ISO15693 transparent mode via uFR Zero reader.
Supports inventory + addressed mode for multi-tag fields.
- Updated DEVELOPMENT_PLAN with I2C bus management notes for
LP5562 (0x30) + NTAG5Link (0x54) shared bus
- Updated README with wired-AND hardware diagram, hall sensor
interaction section, and updated wiring table
- Updated CLAUDE.md with LP5562 EN wired-AND topology docs
- Updated STATUS.md with hall sensor decisions and hardware inventory
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
- Integrate LP5562 driver from sibling project (ntag5-samd21-lp562)
with full doc comments restored
- Update main.rs with complete M1 test: I2C init, GPIO EN, RGBW cycle
- Rewrite DEVELOPMENT_PLAN.md from waterfall to milestone-based groups
organized by hardware availability (Groups A-E)
- Rewrite STATUS.md with milestone checklist tracking
- Add LP5562 timing constraints and flash script docs to CLAUDE.md
- Add flash_when_ready.sh for auto-flash dev workflow
- Add brainstorm design doc for plan redesign rationale
Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
