- Protocol design: streaming single-hold NFC transfer, 7 commands - Implementation plan: 7 tasks for subagent-driven development - STATUS.md: M6 marked complete, current milestone now M7 Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
158 lines
6.2 KiB
Markdown
158 lines
6.2 KiB
Markdown
# xblink Project Status
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**Current Milestone**: M7 — Sleep/Wake
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**Last Updated**: 2026-03-05
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---
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## Phase 0 — Project Setup (COMPLETE)
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- [x] Initialize git repository and Rust project
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- [x] Configure build target (thumbv6m-none-eabi)
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- [x] Create project documentation (README, CLAUDE.md, STATUS, DEVELOPMENT_PLAN)
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- [x] Verify `cargo build --release` compiles
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- [x] Initial git commit
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## Group A — LP5562 Only
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**Hardware needed**: XIAO M0 + LP5562EVM + mini-USB cable
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### M1: LED Smoke Test
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- [x] Copy LP5562 driver from `../ntag5-samd21-lp562/src/lp5562.rs`
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- [x] Create `src/led/mod.rs` with re-exports
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- [x] Update `main.rs` with I2C init + GPIO EN + LP5562 direct PWM test
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- [x] Verify `cargo build --release` compiles
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- [x] Verify LP5562 I2C control via EVM USB-to-I2C bridge (`tools/lp5562_evm.py`)
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- [x] Flash XIAO M0 and verify RGBW LED channels with Rust firmware
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### M2: Engine Patterns
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- [x] Build breathing pattern (1 engine, ramp up/down, branch loop)
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- [x] Build heartbeat pattern (1 engine, fast ramp, slow decay)
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- [x] Build RGB cycle (3 engines, trigger-synced phase offset)
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- [x] Verify LP5562 runs patterns autonomously (MCU idle loop)
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- [x] Verify MCU can stop and switch patterns (8s cycle between all 3)
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### M3: Hardcoded Pattern Library (COMPLETE)
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- [x] Define 5 const patterns in firmware (breathe, heartbeat, slow_pulse, rgb_cycle, color_wash)
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- [x] Implement pattern selector (cycle through patterns, 15s each)
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- [x] Reduce LED current to 2mA/ch (EH-realistic budget)
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- [x] Document engine program structures (`docs/lp5562-engine-reference.md`)
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## Group B — Add NTAG5Link
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**Hardware needed**: + NTAG5Link Click board + I2C jumper
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### M4: NTAG5 EEPROM Read/Write (COMPLETE)
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- [x] Write `Ntag5Link<I2C>` driver (`src/ntag5/mod.rs`)
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- [x] Implement session register access (CONFIG_0, CONFIG_1, EH_CONFIG)
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- [x] Implement EEPROM block read/write with write-verify
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- [x] Config check: read session regs, compare against expected, write NDEF result
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- [x] NDEF Type 5 text record writer for config check output
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- [x] Verified on hardware: config check passes, NDEF readable via NFC
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- [ ] Register map module (`src/ntag5/registers.rs`) — deferred, constants in mod.rs for now
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### M5: Boot-from-EEPROM (COMPLETE)
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- [x] Design XBLK binary pattern format (`docs/plans/2026-03-05-eeprom-pattern-format.md`)
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- [x] Implement XBLK deserializer (`src/pattern/mod.rs`: parse_header, parse_pattern_entry)
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- [x] Implement XBLK serializer (`src/pattern/mod.rs`: serialize_pattern_entry, serialize_header, crc16)
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- [x] Update main.rs: boot → read EEPROM → parse → program LP5562 → idle, with fallback
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- [x] MCU self-provisioning: write hardcoded patterns to EEPROM on first boot
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- [x] Write Python serializer tool (`tools/xblk_serialize.py`) for PCSC pattern uploads
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- [x] Verified on hardware: self-provisioning writes XBLK, subsequent boots load from EEPROM
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### M6: SRAM Mailbox (COMPLETE)
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- [x] Design SRAM mailbox protocol (`docs/plans/2026-03-05-sram-mailbox-protocol.md`)
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- [x] Add NTAG5 `write_register`, SRAM read/write, FD pin configuration
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- [x] Implement command protocol types and CRC helpers (`src/ntag5/sram.rs`)
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- [x] Implement all 7 command handlers (WRITE_PATTERN, GET_STATUS, SET_ACTIVE, SYNC_START/END, READ_LIBRARY/NEXT)
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- [x] Streaming transfer: single NFC hold for full library sync (one pattern per SRAM round-trip)
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- [x] FD pin polling in main idle loop (200ms interval, A1/PA04)
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- [x] I2C bus swapping for LP5562 reprogramming after pattern updates
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- [ ] Hardware test: flash and verify with PCSC reader / phone app (pending FD pin wiring)
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## Group C — Power + Recovery
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**Hardware needed**: + Hall sensor + multimeter
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### M7: Sleep/Wake
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- [ ] Configure SAMD21 EIC for FD pin wake
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- [ ] Implement STANDBY sleep after LP5562 programming
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- [ ] Verify LP5562 keeps running during MCU sleep
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- [ ] Measure current: active vs standby vs total system
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### M8: Recovery Mode
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- [ ] Wire hall sensor to EIC-capable GPIO
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- [ ] Implement boot-time hall sensor check
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- [ ] Recovery: load default pattern, skip EEPROM, stay awake
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- [ ] Test with magnet
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### M9: Power Characterization
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- [ ] Measure current at various LED current settings
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- [ ] Test NTAG5Link EH output with phone NFC
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- [ ] Find optimal brightness vs EH budget balance
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- [ ] Document real power numbers
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## Group D — Abstraction + Polish
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### M10: LedController Trait
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- [ ] Define trait based on proven usage patterns from Groups A-C
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- [ ] Implement for LP5562 wrapper
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- [ ] Refactor main.rs to trait-based API
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### M11: SimplePwm Driver
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- [ ] Implement only if single-color LED hardware is available
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## Group E — Future
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### Custom PCB (SAMD21E)
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- [ ] Port to `atsamd-hal` with `samd21e` feature
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- [ ] Custom `memory.x` linker script
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- [ ] PCB design and fabrication
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### Companion App (React Native)
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- [ ] NFC communication + pattern editor + upload
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### Firmware Update (NFC OTA)
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- [ ] Custom bootloader if needed post-implant
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---
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## Open Questions
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| Question | Status | Notes |
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|----------|--------|-------|
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| Energy harvesting power budget | TBD | Multimeter measurements in M9 |
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| Optimal LED current per channel | TBD | Probably 2-5mA/ch, verify in M9 |
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| Firmware update strategy | Deferred | UF2 for dev, NFC OTA evaluated later |
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| NTAG5Link I2C slave address | Assumed 0x54 | Verify in M4 with Click board |
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| Pattern binary format | Deferred to M5 | Design after M2-M3 engine experience |
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| Hall sensor + EN circuit | Designed | Wired-AND: hall + MCU open-drain on EN with 1M pull-up. See `docs/plans/2026-03-03-hall-en-design.md` |
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| Hall sensor part selection | Decided | DRV5032FB (SOT-23, 8.4mT, prototype) → DRV5032FE (X2SON 1x1mm, final PCB) |
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| EN pull-up value | Decided | 1M — zero steady-state draw, 3µA when EN low, ~10µs rise time |
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## Hardware Inventory
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| Item | Status | Notes |
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|------|--------|-------|
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| Seeed XIAO M0 | Available | Dev board MCU (SAMD21G18A) |
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| LP5562EVM | Available | TI eval module, RGBW LEDs, I2C addr 0x30 |
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| Mini-USB cable | Available | USB-C, used for flashing XIAO M0 |
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| NTAG5 Link Click | Available, partially wired | Missing I2C jumper to XIAO |
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| Hall effect sensor | Not available | Need to source — TI DRV5032FB (SOT-23) for prototype |
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| ACR1552 PCSC reader | Available | For ntag5sensor Python tooling |
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| Multimeter | Available | For power budget measurements |
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